]> www.infradead.org Git - nvme.git/commit
drm/i915/mtl: Skip PLL state verification in TBT mode
authorImre Deak <imre.deak@intel.com>
Wed, 26 Jun 2024 17:08:13 +0000 (20:08 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 28 Jun 2024 09:50:52 +0000 (12:50 +0300)
commit32a120f52a4c0121bca8f2328d4680d283693d60
tree22188711592eb6ff7d8549bc97539761d5070934
parenta9422ec92a6388c8a19fad759f7ed0d533734cc6
drm/i915/mtl: Skip PLL state verification in TBT mode

In TBT-alt mode the driver doesn't program the PHY's PLL, which is
handled instead by Thunderbolt driver/FW components, hence the PLL's HW
vs. SW state verification should be skipped. During HW readout set a flag
in the PLL state if the port was at the moment in TBT-alt mode and skip
the verification of PLL parameters in this case.

Fixes: 45fe957ae769 ("drm/i915/display: Add compare config for MTL+ platforms")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11258
Cc: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240626170813.806470-1-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_dpll_mgr.h