rasdaemon: Handle reassigned bit definitions for UMC bank

rasdaemon: Handle reassigned bit definitions for UMC bank

On some AMD systems some of the existing bit definitions in the
CTL register of SMCA bank type are reassigned without defining
new HWID and McaType. Consequently, the errors whose bit
definitions have been reassigned in the CTL register are being
erroneously decoded.

Add new error description structure to compensate for the
reassigned bit definitions, by new software defined SMCA bank
type by utilizing  the hardware-reserved values for HWID.
The new SMCA bank type will only be employed for UMC error
decoding on affected models and the existing error description
structure for UMC bank type is still valid.

Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>