]> www.infradead.org Git - users/jedix/linux-maple.git/commit
vfio/pci: Enable iowrite64 and ioread64 for vfio pci
authorRamesh Thomas <ramesh.thomas@intel.com>
Tue, 10 Dec 2024 13:19:37 +0000 (05:19 -0800)
committerAlex Williamson <alex.williamson@redhat.com>
Mon, 6 Jan 2025 15:09:53 +0000 (08:09 -0700)
commit2b938e3db335e3670475e31a722c2bee34748c5a
treea7bdb46c6d9db4c44bf78185a0c4a595488750c3
parent13563da6ffcf49b8b45772e40b35f96926a7ee1e
vfio/pci: Enable iowrite64 and ioread64 for vfio pci

Definitions of ioread64 and iowrite64 macros in asm/io.h called by vfio
pci implementations are enclosed inside check for CONFIG_GENERIC_IOMAP.
They don't get defined if CONFIG_GENERIC_IOMAP is defined. Include
linux/io-64-nonatomic-lo-hi.h to define iowrite64 and ioread64 macros
when they are not defined. io-64-nonatomic-lo-hi.h maps the macros to
generic implementation in lib/iomap.c. The generic implementation does
64 bit rw if readq/writeq is defined for the architecture, otherwise it
would do 32 bit back to back rw.

Note that there are two versions of the generic implementation that
differs in the order the 32 bit words are written if 64 bit support is
not present. This is not the little/big endian ordering, which is
handled separately. This patch uses the lo followed by hi word ordering
which is consistent with current back to back implementation in the
vfio/pci code.

Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20241210131938.303500-2-ramesh.thomas@intel.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
drivers/vfio/pci/vfio_pci_rdwr.c