]> www.infradead.org Git - nvme.git/commit
net/mlx5e: Support SWP-mode offload L4 csum calculation
authorRahul Rameshbabu <rrameshbabu@nvidia.com>
Thu, 13 Jun 2024 21:00:36 +0000 (00:00 +0300)
committerJakub Kicinski <kuba@kernel.org>
Sat, 15 Jun 2024 01:53:24 +0000 (18:53 -0700)
commit296eaab825060d0f25e89b2f85ab9fc26128cea8
tree1251f9a239173b6c5b7fcb6fffa38ec22db0f87a
parentfac15a72b8e5c2baea5346fe56403f3dcf12755e
net/mlx5e: Support SWP-mode offload L4 csum calculation

Calculate the pseudo-header checksum for both IPSec transport mode and
IPSec tunnel mode for mlx5 devices that do not implement a pure hardware
checksum offload for L4 checksum calculation. Introduce a capability bit
that identifies such mlx5 devices.

Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Reviewed-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Cosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://lore.kernel.org/r/20240613210036.1125203-7-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h
include/linux/mlx5/mlx5_ifc.h