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phy: phy-rockchip-samsung-hdptx: Swap the definitions of LCPLL_REF and ROPLL_REF
authorDamon Ding <damon.ding@rock-chips.com>
Wed, 5 Feb 2025 10:51:54 +0000 (18:51 +0800)
committerVinod Koul <vkoul@kernel.org>
Thu, 13 Feb 2025 18:00:36 +0000 (23:30 +0530)
commit2947c8065e9efdd3b6434d2817dc8896234a3fc0
treee1ec2f12159829d1f66745450881f80bb126e0b7tree
parent279950205dde78bc0e3ca73a8dfee6842f0e1edccommit | diff
phy: phy-rockchip-samsung-hdptx: Swap the definitions of LCPLL_REF and ROPLL_REF

According to the datasheet, setting the dig_clk_sel bit of CMN_REG(0097)
to 1'b1 selects LCPLL as the reference clock, while setting it to 1'b0
selects the ROPLL.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250205105157.580060-2-damon.ding@rock-chips.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c diff | blob | history
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