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drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16 pixels
authorMarek Szyprowski <m.szyprowski@samsung.com>
Thu, 7 Jun 2018 11:06:11 +0000 (13:06 +0200)
committerInki Dae <inki.dae@samsung.com>
Fri, 29 Jun 2018 09:02:57 +0000 (18:02 +0900)
commit28b676329cc1adfa37b5291e13055e0819a80e42
treea421708ee73fc977280187e2b402db44a44fba4etree
parent4958a1c0c9c4a48d6ba9e2b184d93cab0dce68e1commit | diff
drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16 pixels

Investigation revealed that GScaler hardware requires the real buffer width
(pitch) to be aligned to 16 pixels.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
drivers/gpu/drm/exynos/exynos_drm_gsc.c diff | blob | history
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