]> www.infradead.org Git - users/dwmw2/qemu.git/commit
target/riscv: Add cycle & instret privilege mode filtering properties
authorKaiwen Xue <kaiwenx@rivosinc.com>
Thu, 11 Jul 2024 22:31:06 +0000 (15:31 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 18 Jul 2024 02:08:44 +0000 (12:08 +1000)
commit251dccc09af363900436656461151681687e2470
tree9f6df98a4540502948e184aa918b125fdc4ec3a5
parentbe470e597708451e6fecb0631728fa759164d03e
target/riscv: Add cycle & instret privilege mode filtering properties

This adds the properties for ISA extension smcntrpmf. Patches
implementing it will follow.

Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240711-smcntrpmf_v7-v8-3-b7c38ae7b263@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu_cfg.h