]> www.infradead.org Git - users/willy/xarray.git/commit
riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection
authorAndy Chiu <andy.chiu@sifive.com>
Thu, 9 May 2024 16:26:55 +0000 (00:26 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 30 May 2024 21:33:08 +0000 (14:33 -0700)
commit1e7483542bf8d6c1fc9f220dfe8a12eeffdc72d5
treed743cdce00251984a991226c1cf7548ed371587d
parent037df2966afc8dfaa06788245cffca345dcf9a26
riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection

Multiple Vector subextensions are added. Also, the patch takes care of
the dependencies of Vector subextensions by macro expansions. So, if
some "embedded" platform only reports "zve64f" on the ISA string, the
parser is able to expand it to zve32x zve32f zve64x and zve64f.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240510-zve-detection-v5-5-0711bdd26c12@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpufeature.c