www.infradead.org Git - users/jedix/linux-maple.git/commit

author	Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
	Tue, 22 Nov 2022 20:39:19 +0000 (15:39 -0500)
committer	Peter Zijlstra <peterz@infradead.org>
	Tue, 27 Dec 2022 11:52:14 +0000 (12:52 +0100)
commit	171586a6ab66fb6be064e399ac2024ab459dfcf9
tree	c76bb9b35b58ad3a200eb878a0c10b472ced2a5e	tree
parent	a94af3c58462d23c45879e1bbe86ed5702d5bd86	commit \| diff

selftests/rseq: riscv: Template memory ordering and percpu access mode

Introduce a rseq-riscv-bits.h template header which is internally included
to generate the static inline functions covering:

- relaxed and release memory ordering,
- per-cpu-id and per-mm-cid per-cpu data access.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20221122203932.231377-18-mathieu.desnoyers@efficios.com

tools/testing/selftests/rseq/rseq-riscv-bits.h	[new file with mode: 0644]	blob
tools/testing/selftests/rseq/rseq-riscv.h		diff \| blob \| history