]> www.infradead.org Git - users/dwmw2/linux.git/commit
riscv: Improve sbi_ecall() code generation by reordering arguments
authorAlexandre Ghiti <alexghiti@rivosinc.com>
Fri, 22 Mar 2024 11:26:29 +0000 (12:26 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 10 Jul 2024 20:30:56 +0000 (13:30 -0700)
commit16badacd8af48980c546839626d0329bab32b4c3
treec659b510a766336e677f667b328f695b4b399ac4
parent56c1c1a09ab93c7b7c957860f01f8600d6c03143
riscv: Improve sbi_ecall() code generation by reordering arguments

The sbi_ecall() function arguments are not in the same order as the
ecall arguments, so we end up re-ordering the registers before the
ecall which is useless and costly.

So simply reorder the arguments in the same way as expected by ecall.
Instead of reordering directly the arguments of sbi_ecall(), use a proxy
macro since the current ordering is more natural.

Before:

Dump of assembler code for function sbi_ecall:
   0xffffffff800085e0 <+0>: add sp,sp,-32
   0xffffffff800085e2 <+2>: sd s0,24(sp)
   0xffffffff800085e4 <+4>: mv t1,a0
   0xffffffff800085e6 <+6>: add s0,sp,32
   0xffffffff800085e8 <+8>: mv t3,a1
   0xffffffff800085ea <+10>: mv a0,a2
   0xffffffff800085ec <+12>: mv a1,a3
   0xffffffff800085ee <+14>: mv a2,a4
   0xffffffff800085f0 <+16>: mv a3,a5
   0xffffffff800085f2 <+18>: mv a4,a6
   0xffffffff800085f4 <+20>: mv a5,a7
   0xffffffff800085f6 <+22>: mv a6,t3
   0xffffffff800085f8 <+24>: mv a7,t1
   0xffffffff800085fa <+26>: ecall
   0xffffffff800085fe <+30>: ld s0,24(sp)
   0xffffffff80008600 <+32>: add sp,sp,32
   0xffffffff80008602 <+34>: ret

After:

Dump of assembler code for function __sbi_ecall:
   0xffffffff8000b6b2 <+0>: add sp,sp,-32
   0xffffffff8000b6b4 <+2>: sd s0,24(sp)
   0xffffffff8000b6b6 <+4>: add s0,sp,32
   0xffffffff8000b6b8 <+6>: ecall
   0xffffffff8000b6bc <+10>: ld s0,24(sp)
   0xffffffff8000b6be <+12>: add sp,sp,32
   0xffffffff8000b6c0 <+14>: ret

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Yunhui Cui <cuiyunhui@bytedance.com>
Link: https://lore.kernel.org/r/20240322112629.68170-1-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/sbi.h
arch/riscv/kernel/sbi.c