]> www.infradead.org Git - users/willy/xarray.git/commit
drm/i915/display: Read PSR configuration before VSC SDP
authorJouni Högander <jouni.hogander@intel.com>
Wed, 20 Dec 2023 10:36:08 +0000 (12:36 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Fri, 22 Dec 2023 06:15:13 +0000 (08:15 +0200)
commit16448cf437ea935b0b05ad4c5891b5bc430fa6ff
tree11a2335b0e6a038133cb40a0afcd70b3826ad782
parent6b6276138450617575f1a3176de3a9e289dfa3db
drm/i915/display: Read PSR configuration before VSC SDP

VSC SDP sending is taken care by PSR HW and it's not enabled in
VIDEO_DIP_CTL when PSR is enabled. Readback of VSC SDP is depending on
VSC_SDP being set in intel_crtc_state->infoframes.enabled. In case of PSR
setting this flag is taken care by PSR code -> read back PSR configuration
before reading VSC SDP otherwise we get pipeconfig mismatch error.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-7-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c