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arm64: dts: socfpga: stratix10: add L2 cache info
authorBeniamin Sandu <beniaminsandu@gmail.com>
Wed, 15 May 2024 18:12:49 +0000 (19:12 +0100)
committerDinh Nguyen <dinguyen@kernel.org>
Fri, 31 May 2024 22:04:12 +0000 (17:04 -0500)
commit1536dc8edc653e0e4a333035a73ff146d0517749
tree1a62505ed040a830e4a35f014cb085b6d595415ftree
parent32cdf4c75fdd135e66e11383aa84687873b77b89commit | diff
arm64: dts: socfpga: stratix10: add L2 cache info

This removes cacheinfo warnings at boot, e.g.:
cacheinfo: Unable to detect cache hierarchy for CPU 0

Signed-off-by: Beniamin Sandu <beniaminsandu@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi diff | blob | history
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