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arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP
authorMarek Vasut <marex@denx.de>
Fri, 2 Dec 2022 16:23:52 +0000 (17:23 +0100)
committerShawn Guo <shawnguo@kernel.org>
Sat, 31 Dec 2022 12:35:01 +0000 (20:35 +0800)
commit105b9bb84f4936a5998fcd403a4439e65a84436b
treee080ef3affaeeb55e2751a93079aa3b64a0bab24tree
parent5b81a87ddd56ebdcdc7bf5430bc33872168c36f4commit | diff
arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP

The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values in OCOTP. Add the OCOTP calibration values phandle so
the TMU driver can perform this programming.

The MX8MM/MX8MN TMUv1 uses only one OCOTP cell, while MX8MP TMUv2 uses 4.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm.dtsi diff | blob | history
arch/arm64/boot/dts/freescale/imx8mn.dtsi diff | blob | history
arch/arm64/boot/dts/freescale/imx8mp.dtsi diff | blob | history
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