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drm/amdgpu: Add indirect L1_TLB_CNTL reg programming for VFs
authorVictor Skvortsov <victor.skvortsov@amd.com>
Thu, 27 Mar 2025 15:38:42 +0000 (11:38 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Apr 2025 19:18:58 +0000 (15:18 -0400)
commit0c6e39ce6da20104900b11bad64464a12fb47320
treeb206cfafc7de7cf69f21ef19e0fa544a81792732tree
parent4aa8de3d03124db71f24a9bd01198407294456facommit | diff
drm/amdgpu: Add indirect L1_TLB_CNTL reg programming for VFs

VFs on some IP versions are unable to access this register directly.

This register must be programmed before PSP ring is setup,
so use PSP VF mailbox directly. PSP will broadcast the register
value to all VF assigned instances.

Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com>
Reviewed-by: Zhigang Luo <Zhigang.luo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h diff | blob | history
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h diff | blob | history
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h diff | blob | history
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c diff | blob | history
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c diff | blob | history
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