]> www.infradead.org Git - users/jedix/linux-maple.git/commit
idpf: trigger SW interrupt when exiting wb_on_itr mode
authorJoshua Hay <joshua.a.hay@intel.com>
Mon, 25 Nov 2024 23:58:55 +0000 (15:58 -0800)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 17 Dec 2024 22:00:26 +0000 (14:00 -0800)
commit0c1683c681681c14f4389e3bfa8de10baf242ba8
tree34ef08ffbaa08f48e84c49994564eddfd6460cc5
parent93433c1d919775f8ac0f7893692f42e6731a5373
idpf: trigger SW interrupt when exiting wb_on_itr mode

There is a race condition between exiting wb_on_itr and completion write
backs. For example, we are in wb_on_itr mode and a Tx completion is
generated by HW, ready to be written back, as we are re-enabling
interrupts:

HW                      SW
|                       |
| | idpf_tx_splitq_clean_all
|                       | napi_complete_done
| |
| tx_completion_wb  | idpf_vport_intr_update_itr_ena_irq

That tx_completion_wb happens before the vector is fully re-enabled.
Continuing with this example, it is a UDP stream and the
tx_completion_wb is the last one in the flow (there are no rx packets).
Because the HW generated the completion before the interrupt is fully
enabled, the HW will not fire the interrupt once the timer expires and
the write back will not happen. NAPI poll won't be called.  We have
indicated we're back in interrupt mode but nothing else will trigger the
interrupt. Therefore, the completion goes unprocessed, triggering a Tx
timeout.

To mitigate this, fire a SW triggered interrupt upon exiting wb_on_itr.
This interrupt will catch the rogue completion and avoid the timeout.
Add logic to set the appropriate bits in the vector's dyn_ctl register.

Fixes: 9c4a27da0ecc ("idpf: enable WB_ON_ITR")
Reviewed-by: Madhu Chittim <madhu.chittim@intel.com>
Signed-off-by: Joshua Hay <joshua.a.hay@intel.com>
Tested-by: Krishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/idpf/idpf_txrx.c