]> www.infradead.org Git - users/dwmw2/qemu.git/commit
target/riscv: Add Ssdbltrp CSRs handling
authorClément Léger <cleger@rivosinc.com>
Fri, 10 Jan 2025 12:54:33 +0000 (13:54 +0100)
committerAlistair Francis <alistair.francis@wdc.com>
Sat, 18 Jan 2025 23:44:35 +0000 (09:44 +1000)
commit0aadf8162a77a03c79e35e76e16b99cd18ef7916
tree229b19a106b44ed0b0b2fc5102417adc9a7c00f6
parent507957eb2acfd321646c98bc853d6c8bafe628d2
target/riscv: Add Ssdbltrp CSRs handling

Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT,
{H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the
presence of the Ssdbltrp ISA extension.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250110125441.3208676-3-cleger@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/cpu_bits.h
target/riscv/cpu_cfg.h
target/riscv/cpu_helper.c
target/riscv/csr.c