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(merge: 9fbae05 b0b8d3a)
Add RZ/G3E xSPI support
authorMark Brown <broonie@kernel.org>
Fri, 9 May 2025 09:06:17 +0000 (18:06 +0900)
committerMark Brown <broonie@kernel.org>
Fri, 9 May 2025 09:06:17 +0000 (18:06 +0900)
commit09fd04daed0746d8e77ed2327f26c671ce49023c
treed2240a6213535df8e40eb544aa269b40f97ff55btree
parent9fbae052f6f68056fd84e8ba096a7e9ab3464f3dcommit | diff
parentb0b8d3aeadb5c49bf78305a1bc844e5a9378257ccommit | diff
Add RZ/G3E xSPI support

Merge series from Biju Das <biju.das.jz@bp.renesas.com>:

The xSPI IP found on RZ/G3E SoC similar to RPC-IF interface, but it
can support writes on memory-mapped area. Even though the registers are
different, the rpcif driver code can be reused for xSPI by adding wrapper
functions.
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