]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm: panel: jd9365da: fix reset signal polarity in unprepare
authorHugo Villeneuve <hvilleneuve@dimonoff.com>
Thu, 17 Apr 2025 19:55:06 +0000 (15:55 -0400)
committerNeil Armstrong <neil.armstrong@linaro.org>
Tue, 22 Apr 2025 07:42:04 +0000 (09:42 +0200)
commit095c8e61f4c71cd4630ee11a82e82cc341b38464
tree749eebf124b18c39747e78ddcbe498c88022e54b
parent1017560164b6bbcbc93579266926e6e96675262a
drm: panel: jd9365da: fix reset signal polarity in unprepare

commit a8972d5a49b4 ("drm: panel: jd9365da-h3: fix reset signal polarity")
fixed reset signal polarity in jadard_dsi_probe() and jadard_prepare().

It was not done in jadard_unprepare() because of an incorrect assumption
about reset line handling in power off mode. After looking into the
datasheet, it now appears that before disabling regulators, the reset line
is deasserted first, and if reset_before_power_off_vcioo is true, then the
reset line is asserted.

Fix reset polarity by inverting gpiod_set_value() second argument in
in jadard_unprepare().

Fixes: 6b818c533dd8 ("drm: panel: Add Jadard JD9365DA-H3 DSI panel")
Fixes: 2b976ad760dc ("drm/panel: jd9365da: Support for kd101ne3-40ti MIPI-DSI panel")
Fixes: a8972d5a49b4 ("drm: panel: jd9365da-h3: fix reset signal polarity")
Cc: stable@vger.kernel.org
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250417195507.778731-1-hugo@hugovil.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250417195507.778731-1-hugo@hugovil.com
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c