]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915: Define and compute Transcoder CMRR registers
authorMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Mon, 10 Jun 2024 07:21:56 +0000 (12:51 +0530)
committerSuraj Kandpal <suraj.kandpal@intel.com>
Tue, 11 Jun 2024 04:28:06 +0000 (09:58 +0530)
commit06173340336c8f21ed5151a93a5398a8725c4704
treeb41ce59af74b2aabf4819ba2af9525cf2aab13e6
parent6eb82761887a6e031b6cb85d4491f434b9c7e73c
drm/i915: Define and compute Transcoder CMRR registers

Add register definitions for Transcoder Fixed Average
Vtotal mode/CMRR function, with the necessary bitfields.
Compute these registers when CMRR is enabled, extending
Adaptive refresh rate capabilities.

--v2:
- Use intel_de_read64_2x32 in intel_vrr_get_config. [Jani]
- Fix indent and order based on register offset. [Jani]

--v3:
- Removing RFC tag.

--v4:
- Update place holder for CMRR register definition. (Jani)

--v5:
- Add CMRR register definitions to a separate file intel_vrr_reg.h.

--v6:
- Fixed indentation. (Jani)
- Add dependency header intel_display_reg_defs.h. (Jani)
- Rename file name to intel_vrr_regs.h instead of reg.h (Jani)

--v7:
- Remove adding CMRR flag to vrr_ctl register during set_transcoder_timing,
as it is already being done during intel_vrr_enable. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240610072203.24956-4-mitulkumar.ajitkumar.golani@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_vrr.c
drivers/gpu/drm/i915/display/intel_vrr_regs.h