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dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description
authorAndy Chiu <andy.chiu@sifive.com>
Thu, 9 May 2024 16:26:54 +0000 (00:26 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 30 May 2024 21:33:07 +0000 (14:33 -0700)
commit037df2966afc8dfaa06788245cffca345dcf9a26
tree554d030518e3783d19d595b130f43f002fa06c5atree
parent98a5700dfaec1043c8b69eb25f44896be557dd4ccommit | diff
dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description

Add description for Zve32x Zve32f Zve64x Zve64f Zve64d ISA extensions.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240510-zve-detection-v5-4-0711bdd26c12@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml diff | blob | history
XArray, radix tree and IDR