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clk: renesas: div6: Implement range checking
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 1 Apr 2021 13:01:38 +0000 (15:01 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 11 May 2021 07:58:13 +0000 (09:58 +0200)
commit02c69593e62d51dd6b29b58724a6947ba72074f0
tree72aebf3369d313463915a1d090fe5229eb32f295tree
parent1c924fc679123e6057239693d226c8d8c5780626commit | diff
clk: renesas: div6: Implement range checking

Consider the minimum and maximum clock rates imposed by clock users when
calculating the most appropriate clock rate in the .determine_rate()
callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/35ceb262c71f1b2e9864a39bde9dafd78b2981f4.1617281699.git.geert+renesas@glider.be
drivers/clk/renesas/clk-div6.c diff | blob | history
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