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   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/lightnvm.h>
  15 #include <linux/sed-opal.h>
  16 #include <linux/fault-inject.h>
  17 #include <linux/rcupdate.h>
  18 #include <linux/wait.h>
  19 #include <linux/t10-pi.h>
  20
  21 #include <trace/events/block.h>
  22
  23 extern unsigned int nvme_io_timeout;
  24 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  25
  26 extern unsigned int admin_timeout;
  27 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  28
  29 #define NVME_DEFAULT_KATO       5
  30 #define NVME_KATO_GRACE         10
  31
  32 #ifdef CONFIG_ARCH_NO_SG_CHAIN
  33 #define  NVME_INLINE_SG_CNT  0
  34 #define  NVME_INLINE_METADATA_SG_CNT  0
  35 #else
  36 #define  NVME_INLINE_SG_CNT  2
  37 #define  NVME_INLINE_METADATA_SG_CNT  1
  38 #endif
  39
  40 /*
  41  * Default to a 4K page size, with the intention to update this
  42  * path in the future to accommodate architectures with differing
  43  * kernel and IO page sizes.
  44  */
  45 #define NVME_CTRL_PAGE_SHIFT    12
  46 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
  47
  48 extern struct workqueue_struct *nvme_wq;
  49 extern struct workqueue_struct *nvme_reset_wq;
  50 extern struct workqueue_struct *nvme_delete_wq;
  51
  52 enum {
  53         NVME_NS_LBA             = 0,
  54         NVME_NS_LIGHTNVM        = 1,
  55 };
  56
  57 /*
  58  * List of workarounds for devices that required behavior not specified in
  59  * the standard.
  60  */
  61 enum nvme_quirks {
  62         /*
  63          * Prefers I/O aligned to a stripe size specified in a vendor
  64          * specific Identify field.
  65          */
  66         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  67
  68         /*
  69          * The controller doesn't handle Identify value others than 0 or 1
  70          * correctly.
  71          */
  72         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  73
  74         /*
  75          * The controller deterministically returns O's on reads to
  76          * logical blocks that deallocate was called on.
  77          */
  78         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  79
  80         /*
  81          * The controller needs a delay before starts checking the device
  82          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  83          */
  84         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  85
  86         /*
  87          * APST should not be used.
  88          */
  89         NVME_QUIRK_NO_APST                      = (1 << 4),
  90
  91         /*
  92          * The deepest sleep state should not be used.
  93          */
  94         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  95
  96         /*
  97          * Supports the LighNVM command set if indicated in vs[1].
  98          */
  99         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
 100
 101         /*
 102          * Set MEDIUM priority on SQ creation
 103          */
 104         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
 105
 106         /*
 107          * Ignore device provided subnqn.
 108          */
 109         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
 110
 111         /*
 112          * Broken Write Zeroes.
 113          */
 114         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
 115
 116         /*
 117          * Force simple suspend/resume path.
 118          */
 119         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
 120
 121         /*
 122          * Use only one interrupt vector for all queues
 123          */
 124         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
 125
 126         /*
 127          * Use non-standard 128 bytes SQEs.
 128          */
 129         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
 130
 131         /*
 132          * Prevent tag overlap between queues
 133          */
 134         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
 135
 136         /*
 137          * Don't change the value of the temperature threshold feature
 138          */
 139         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
 140 };
 141
 142 /*
 143  * Common request structure for NVMe passthrough.  All drivers must have
 144  * this structure as the first member of their request-private data.
 145  */
 146 struct nvme_request {
 147         struct nvme_command     *cmd;
 148         union nvme_result       result;
 149         u8                      retries;
 150         u8                      flags;
 151         u16                     status;
 152         struct nvme_ctrl        *ctrl;
 153 };
 154
 155 /*
 156  * Mark a bio as coming in through the mpath node.
 157  */
 158 #define REQ_NVME_MPATH          REQ_DRV
 159
 160 enum {
 161         NVME_REQ_CANCELLED              = (1 << 0),
 162         NVME_REQ_USERCMD                = (1 << 1),
 163 };
 164
 165 static inline struct nvme_request *nvme_req(struct request *req)
 166 {
 167         return blk_mq_rq_to_pdu(req);
 168 }
 169
 170 static inline u16 nvme_req_qid(struct request *req)
 171 {
 172         if (!req->rq_disk)
 173                 return 0;
 174         return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
 175 }
 176
 177 /* The below value is the specific amount of delay needed before checking
 178  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 179  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 180  * found empirically.
 181  */
 182 #define NVME_QUIRK_DELAY_AMOUNT         2300
 183
 184 /*
 185  * enum nvme_ctrl_state: Controller state
 186  *
 187  * @NVME_CTRL_NEW:              New controller just allocated, initial state
 188  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
 189  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
 190  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
 191  *                              transport
 192  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
 193  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
 194  *                              disabled/failed immediately. This state comes
 195  *                              after all async event processing took place and
 196  *                              before ns removal and the controller deletion
 197  *                              progress
 198  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
 199  *                              shutdown or removal. In this case we forcibly
 200  *                              kill all inflight I/O as they have no chance to
 201  *                              complete
 202  */
 203 enum nvme_ctrl_state {
 204         NVME_CTRL_NEW,
 205         NVME_CTRL_LIVE,
 206         NVME_CTRL_RESETTING,
 207         NVME_CTRL_CONNECTING,
 208         NVME_CTRL_DELETING,
 209         NVME_CTRL_DELETING_NOIO,
 210         NVME_CTRL_DEAD,
 211 };
 212
 213 struct nvme_fault_inject {
 214 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 215         struct fault_attr attr;
 216         struct dentry *parent;
 217         bool dont_retry;        /* DNR, do not retry */
 218         u16 status;             /* status code */
 219 #endif
 220 };
 221
 222 struct nvme_cel {
 223         struct list_head        entry;
 224         struct nvme_effects_log log;
 225         u8                      csi;
 226 };
 227
 228 struct nvme_ctrl {
 229         bool comp_seen;
 230         enum nvme_ctrl_state state;
 231         bool identified;
 232         spinlock_t lock;
 233         struct mutex scan_lock;
 234         const struct nvme_ctrl_ops *ops;
 235         struct request_queue *admin_q;
 236         struct request_queue *connect_q;
 237         struct request_queue *fabrics_q;
 238         struct device *dev;
 239         int instance;
 240         int numa_node;
 241         struct blk_mq_tag_set *tagset;
 242         struct blk_mq_tag_set *admin_tagset;
 243         struct list_head namespaces;
 244         struct rw_semaphore namespaces_rwsem;
 245         struct device ctrl_device;
 246         struct device *device;  /* char device */
 247         struct cdev cdev;
 248         struct work_struct reset_work;
 249         struct work_struct delete_work;
 250         wait_queue_head_t state_wq;
 251
 252         struct nvme_subsystem *subsys;
 253         struct list_head subsys_entry;
 254
 255         struct opal_dev *opal_dev;
 256
 257         char name[12];
 258         u16 cntlid;
 259
 260         u32 ctrl_config;
 261         u16 mtfa;
 262         u32 queue_count;
 263
 264         u64 cap;
 265         u32 max_hw_sectors;
 266         u32 max_segments;
 267         u32 max_integrity_segments;
 268 #ifdef CONFIG_BLK_DEV_ZONED
 269         u32 max_zone_append;
 270 #endif
 271         u16 crdt[3];
 272         u16 oncs;
 273         u16 oacs;
 274         u16 nssa;
 275         u16 nr_streams;
 276         u16 sqsize;
 277         u32 max_namespaces;
 278         atomic_t abort_limit;
 279         u8 vwc;
 280         u32 vs;
 281         u32 sgls;
 282         u16 kas;
 283         u8 npss;
 284         u8 apsta;
 285         u16 wctemp;
 286         u16 cctemp;
 287         u32 oaes;
 288         u32 aen_result;
 289         u32 ctratt;
 290         unsigned int shutdown_timeout;
 291         unsigned int kato;
 292         bool subsystem;
 293         unsigned long quirks;
 294         struct nvme_id_power_state psd[32];
 295         struct nvme_effects_log *effects;
 296         struct list_head cels;
 297         struct work_struct scan_work;
 298         struct work_struct async_event_work;
 299         struct delayed_work ka_work;
 300         struct nvme_command ka_cmd;
 301         struct work_struct fw_act_work;
 302         unsigned long events;
 303         bool created;
 304
 305 #ifdef CONFIG_NVME_MULTIPATH
 306         /* asymmetric namespace access: */
 307         u8 anacap;
 308         u8 anatt;
 309         u32 anagrpmax;
 310         u32 nanagrpid;
 311         struct mutex ana_lock;
 312         struct nvme_ana_rsp_hdr *ana_log_buf;
 313         size_t ana_log_size;
 314         struct timer_list anatt_timer;
 315         struct work_struct ana_work;
 316 #endif
 317
 318         /* Power saving configuration */
 319         u64 ps_max_latency_us;
 320         bool apst_enabled;
 321
 322         /* PCIe only: */
 323         u32 hmpre;
 324         u32 hmmin;
 325         u32 hmminds;
 326         u16 hmmaxd;
 327
 328         /* Fabrics only */
 329         u32 ioccsz;
 330         u32 iorcsz;
 331         u16 icdoff;
 332         u16 maxcmd;
 333         int nr_reconnects;
 334         struct nvmf_ctrl_options *opts;
 335
 336         struct page *discard_page;
 337         unsigned long discard_page_busy;
 338
 339         struct nvme_fault_inject fault_inject;
 340 };
 341
 342 enum nvme_iopolicy {
 343         NVME_IOPOLICY_NUMA,
 344         NVME_IOPOLICY_RR,
 345 };
 346
 347 struct nvme_subsystem {
 348         int                     instance;
 349         struct device           dev;
 350         /*
 351          * Because we unregister the device on the last put we need
 352          * a separate refcount.
 353          */
 354         struct kref             ref;
 355         struct list_head        entry;
 356         struct mutex            lock;
 357         struct list_head        ctrls;
 358         struct list_head        nsheads;
 359         char                    subnqn[NVMF_NQN_SIZE];
 360         char                    serial[20];
 361         char                    model[40];
 362         char                    firmware_rev[8];
 363         u8                      cmic;
 364         u16                     vendor_id;
 365         u16                     awupf;  /* 0's based awupf value. */
 366         struct ida              ns_ida;
 367 #ifdef CONFIG_NVME_MULTIPATH
 368         enum nvme_iopolicy      iopolicy;
 369 #endif
 370 };
 371
 372 /*
 373  * Container structure for uniqueue namespace identifiers.
 374  */
 375 struct nvme_ns_ids {
 376         u8      eui64[8];
 377         u8      nguid[16];
 378         uuid_t  uuid;
 379         u8      csi;
 380 };
 381
 382 /*
 383  * Anchor structure for namespaces.  There is one for each namespace in a
 384  * NVMe subsystem that any of our controllers can see, and the namespace
 385  * structure for each controller is chained of it.  For private namespaces
 386  * there is a 1:1 relation to our namespace structures, that is ->list
 387  * only ever has a single entry for private namespaces.
 388  */
 389 struct nvme_ns_head {
 390         struct list_head        list;
 391         struct srcu_struct      srcu;
 392         struct nvme_subsystem   *subsys;
 393         unsigned                ns_id;
 394         struct nvme_ns_ids      ids;
 395         struct list_head        entry;
 396         struct kref             ref;
 397         bool                    shared;
 398         int                     instance;
 399         struct nvme_effects_log *effects;
 400 #ifdef CONFIG_NVME_MULTIPATH
 401         struct gendisk          *disk;
 402         struct bio_list         requeue_list;
 403         spinlock_t              requeue_lock;
 404         struct work_struct      requeue_work;
 405         struct mutex            lock;
 406         unsigned long           flags;
 407 #define NVME_NSHEAD_DISK_LIVE   0
 408         struct nvme_ns __rcu    *current_path[];
 409 #endif
 410 };
 411
 412 enum nvme_ns_features {
 413         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
 414         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
 415 };
 416
 417 struct nvme_ns {
 418         struct list_head list;
 419
 420         struct nvme_ctrl *ctrl;
 421         struct request_queue *queue;
 422         struct gendisk *disk;
 423 #ifdef CONFIG_NVME_MULTIPATH
 424         enum nvme_ana_state ana_state;
 425         u32 ana_grpid;
 426 #endif
 427         struct list_head siblings;
 428         struct nvm_dev *ndev;
 429         struct kref kref;
 430         struct nvme_ns_head *head;
 431
 432         int lba_shift;
 433         u16 ms;
 434         u16 sgs;
 435         u32 sws;
 436         u8 pi_type;
 437 #ifdef CONFIG_BLK_DEV_ZONED
 438         u64 zsze;
 439 #endif
 440         unsigned long features;
 441         unsigned long flags;
 442 #define NVME_NS_REMOVING        0
 443 #define NVME_NS_DEAD            1
 444 #define NVME_NS_ANA_PENDING     2
 445
 446         struct nvme_fault_inject fault_inject;
 447
 448 };
 449
 450 /* NVMe ns supports metadata actions by the controller (generate/strip) */
 451 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
 452 {
 453         return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple);
 454 }
 455
 456 struct nvme_ctrl_ops {
 457         const char *name;
 458         struct module *module;
 459         unsigned int flags;
 460 #define NVME_F_FABRICS                  (1 << 0)
 461 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 462 #define NVME_F_PCI_P2PDMA               (1 << 2)
 463         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 464         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 465         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 466         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 467         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 468         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 469         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 470 };
 471
 472 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 473 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 474                             const char *dev_name);
 475 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 476 void nvme_should_fail(struct request *req);
 477 #else
 478 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 479                                           const char *dev_name)
 480 {
 481 }
 482 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 483 {
 484 }
 485 static inline void nvme_should_fail(struct request *req) {}
 486 #endif
 487
 488 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 489 {
 490         if (!ctrl->subsystem)
 491                 return -ENOTTY;
 492         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 493 }
 494
 495 /*
 496  * Convert a 512B sector number to a device logical block number.
 497  */
 498 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
 499 {
 500         return sector >> (ns->lba_shift - SECTOR_SHIFT);
 501 }
 502
 503 /*
 504  * Convert a device logical block number to a 512B sector number.
 505  */
 506 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
 507 {
 508         return lba << (ns->lba_shift - SECTOR_SHIFT);
 509 }
 510
 511 /*
 512  * Convert byte length to nvme's 0-based num dwords
 513  */
 514 static inline u32 nvme_bytes_to_numd(size_t len)
 515 {
 516         return (len >> 2) - 1;
 517 }
 518
 519 static inline bool nvme_end_request(struct request *req, __le16 status,
 520                 union nvme_result result)
 521 {
 522         struct nvme_request *rq = nvme_req(req);
 523
 524         rq->status = le16_to_cpu(status) >> 1;
 525         rq->result = result;
 526         /* inject error when permitted by fault injection framework */
 527         nvme_should_fail(req);
 528         if (unlikely(blk_should_fake_timeout(req->q)))
 529                 return true;
 530         return blk_mq_complete_request_remote(req);
 531 }
 532
 533 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 534 {
 535         get_device(ctrl->device);
 536 }
 537
 538 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 539 {
 540         put_device(ctrl->device);
 541 }
 542
 543 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
 544 {
 545         return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH;
 546 }
 547
 548 void nvme_complete_rq(struct request *req);
 549 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
 550 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 551                 enum nvme_ctrl_state new_state);
 552 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
 553 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
 554 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 555 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 556 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 557                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 558 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 559 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 560 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 561 int nvme_init_identify(struct nvme_ctrl *ctrl);
 562
 563 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 564
 565 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 566                 bool send);
 567
 568 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 569                 volatile union nvme_result *res);
 570
 571 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 572 void nvme_start_queues(struct nvme_ctrl *ctrl);
 573 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 574 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 575 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 576 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 577 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 578 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 579
 580 #define NVME_QID_ANY -1
 581 struct request *nvme_alloc_request(struct request_queue *q,
 582                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
 583 void nvme_cleanup_cmd(struct request *req);
 584 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 585                 struct nvme_command *cmd);
 586 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 587                 void *buf, unsigned bufflen);
 588 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 589                 union nvme_result *result, void *buffer, unsigned bufflen,
 590                 unsigned timeout, int qid, int at_head,
 591                 blk_mq_req_flags_t flags, bool poll);
 592 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 593                       unsigned int dword11, void *buffer, size_t buflen,
 594                       u32 *result);
 595 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 596                       unsigned int dword11, void *buffer, size_t buflen,
 597                       u32 *result);
 598 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 599 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 600 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 601 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 602 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
 603 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 604
 605 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
 606                 void *log, size_t size, u64 offset);
 607 struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk,
 608                 struct nvme_ns_head **head, int *srcu_idx);
 609 void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx);
 610
 611 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 612 extern const struct block_device_operations nvme_ns_head_ops;
 613
 614 #ifdef CONFIG_NVME_MULTIPATH
 615 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 616 {
 617         return ctrl->ana_log_buf != NULL;
 618 }
 619
 620 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
 621 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
 622 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
 623 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 624                         struct nvme_ctrl *ctrl, int *flags);
 625 bool nvme_failover_req(struct request *req);
 626 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 627 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 628 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
 629 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 630 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 631 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 632 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 633 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
 634 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
 635 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 636 blk_qc_t nvme_ns_head_submit_bio(struct bio *bio);
 637
 638 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 639 {
 640         struct nvme_ns_head *head = ns->head;
 641
 642         if (head->disk && list_empty(&head->list))
 643                 kblockd_schedule_work(&head->requeue_work);
 644 }
 645
 646 static inline void nvme_trace_bio_complete(struct request *req,
 647         blk_status_t status)
 648 {
 649         struct nvme_ns *ns = req->q->queuedata;
 650
 651         if (req->cmd_flags & REQ_NVME_MPATH)
 652                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
 653 }
 654
 655 extern struct device_attribute dev_attr_ana_grpid;
 656 extern struct device_attribute dev_attr_ana_state;
 657 extern struct device_attribute subsys_attr_iopolicy;
 658
 659 #else
 660 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 661 {
 662         return false;
 663 }
 664 /*
 665  * Without the multipath code enabled, multiple controller per subsystems are
 666  * visible as devices and thus we cannot use the subsystem instance.
 667  */
 668 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 669                                       struct nvme_ctrl *ctrl, int *flags)
 670 {
 671         sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
 672 }
 673
 674 static inline bool nvme_failover_req(struct request *req)
 675 {
 676         return false;
 677 }
 678 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 679 {
 680 }
 681 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 682                 struct nvme_ns_head *head)
 683 {
 684         return 0;
 685 }
 686 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
 687                 struct nvme_id_ns *id)
 688 {
 689 }
 690 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 691 {
 692 }
 693 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
 694 {
 695         return false;
 696 }
 697 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
 698 {
 699 }
 700 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 701 {
 702 }
 703 static inline void nvme_trace_bio_complete(struct request *req,
 704         blk_status_t status)
 705 {
 706 }
 707 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
 708                 struct nvme_id_ctrl *id)
 709 {
 710         if (ctrl->subsys->cmic & (1 << 3))
 711                 dev_warn(ctrl->device,
 712 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 713         return 0;
 714 }
 715 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 716 {
 717 }
 718 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 719 {
 720 }
 721 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
 722 {
 723 }
 724 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
 725 {
 726 }
 727 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
 728 {
 729 }
 730 #endif /* CONFIG_NVME_MULTIPATH */
 731
 732 #ifdef CONFIG_BLK_DEV_ZONED
 733 int nvme_update_zone_info(struct gendisk *disk, struct nvme_ns *ns,
 734                           unsigned lbaf);
 735
 736 int nvme_report_zones(struct gendisk *disk, sector_t sector,
 737                       unsigned int nr_zones, report_zones_cb cb, void *data);
 738
 739 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
 740                                        struct nvme_command *cmnd,
 741                                        enum nvme_zone_mgmt_action action);
 742 #else
 743 #define nvme_report_zones NULL
 744
 745 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
 746                 struct request *req, struct nvme_command *cmnd,
 747                 enum nvme_zone_mgmt_action action)
 748 {
 749         return BLK_STS_NOTSUPP;
 750 }
 751
 752 static inline int nvme_update_zone_info(struct gendisk *disk,
 753                                         struct nvme_ns *ns,
 754                                         unsigned lbaf)
 755 {
 756         dev_warn(ns->ctrl->device,
 757                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
 758         return -EPROTONOSUPPORT;
 759 }
 760 #endif
 761
 762 #ifdef CONFIG_NVM
 763 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 764 void nvme_nvm_unregister(struct nvme_ns *ns);
 765 extern const struct attribute_group nvme_nvm_attr_group;
 766 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 767 #else
 768 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 769                                     int node)
 770 {
 771         return 0;
 772 }
 773
 774 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 775 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 776                                                         unsigned long arg)
 777 {
 778         return -ENOTTY;
 779 }
 780 #endif /* CONFIG_NVM */
 781
 782 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 783 {
 784         return dev_to_disk(dev)->private_data;
 785 }
 786
 787 #ifdef CONFIG_NVME_HWMON
 788 void nvme_hwmon_init(struct nvme_ctrl *ctrl);
 789 #else
 790 static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { }
 791 #endif
 792
 793 #endif /* _NVME_H */